09:40:01 <m-relay> <p​olar9669:matrix.org> So only x5 would be affected ? Unless they have have a aes coprocessor
09:43:52 <sech1> I have no idea how it will be affected. The possible range of outcomes are from nothing changed to fully bricked
09:45:00 <sech1> What's more important is that consumer CPUs will be used more efficiently: 5-10% more RandomX instructions executed per second on each core, 2x more AES computations "for free"
09:46:04 <sech1> Most likely result for X5 will be 30% slowdown, if they implemented AES as a separate chip to initialize the scratchpad, and they don't have AES in their RISC-V CPUs
12:11:55 <m-relay> <p​olar9669:matrix.org> Consumer? You mean available to retail?
12:26:35 <gingeropolous> yep. that you can buy at your local bestbuy / costco / walmart
13:19:07 <m-relay> <p​olar9669:matrix.org> So only when rsic-v is available at a US retail store it would be considered non-asic-cpu?
13:19:40 <m-relay> <p​olar9669:matrix.org> So only when rsic-v is available at a US retail store it would be considered as consumer cpu ?
13:20:12 <m-relay> <p​olar9669:matrix.org> Btw rpi4 is available at Walmart
13:30:14 <moneromooo> You seem to be trying to twist things on purpose. This is called disingenuousness. It is regarded as a dishonest way to have a conversation. I suggest you try to avoid it.
13:30:45 <moneromooo> (Not only here, but several times before. One or twice is fine, but a pattern emerges)
13:31:03 <moneromooo> Being constructive is best, if you can.
13:31:58 <sech1> RISC-V is not an asic, and it's not a cpu. It's an open source instruction set and architecture
13:33:06 <sech1> When risc-v based cpus will be a noticeable part of Monero hashrate, then yes we'll be taking it into account in future tweaks (if any)
13:33:40 <sech1> And tweaks will be based on an architecture of actual cpus mining at the time
13:35:34 <sech1> Also, we still don't know X5 architecture. Maybe it has asic chips inside, and risc-v cpu is only used as controller/main cpu on the board
13:41:37 <m-relay> <p​olar9669:matrix.org> Anyway to know which cpus currently mine monero ?
13:41:54 <m-relay> <p​olar9669:matrix.org> Ok, will try avoid it
13:52:08 <hyc> can still order SiFive SBCs if you want to test and feel like writing a JIT
13:52:42 <hyc> we need some perf impact numbers on arm64 too for these new changes
13:54:00 <hyc> I'll try on my M1 macbookpro when I get a chance. can also try on my rk3399 rockpro64 later
14:48:54 <gingeropolous> my intels seem to be taking a slight hit
14:50:16 <gingeropolous> and i can't get huge pages on this one machine. blargh
14:56:51 <gingeropolous> hrm, huge pages problem hitting me on my A6-5200 as well. I use "sudo sysctl -w vm.nr_hugepages=1250" but it still says cache allocation fails
15:00:32 <sech1> your i7-6820HQ gets too low hashrates, you should double check it
15:01:20 <sech1> 7700k only got 0.2% slower, we can ignore it
15:02:13 <sech1> It's expected, because they were already fast with CFROUND instruction, so they don't get this boost
15:35:48 <gingeropolous> ah yeah the 6820 boots with some stupid throttle. forgot about that
15:37:41 <hyc> are we sure this isn't actually penalizing Intel further? they were already inferior to AMD here
15:45:36 <tevador> 0.2% is negligible, you have to consider that we're adding extra 262144 AES rounds and yet the hashrate barely changed
15:51:18 <sech1> If one part of Monero network (Intel) stays with the same hashrate, and another part (AMD) gets 5-10% more hashrate, then I count it as a win.
15:51:28 <sech1> For Monero network as a whole
15:51:51 <sech1> The important part is Intel CPUs still keep their hashrate, even when doing extra AES rounds
15:52:34 <sech1> btw latest Intel CPUs have faster AES than AMD (3 vs 4 clock cycles latency)
15:55:29 <m-relay> <c​harutocafe:matrix.org> does RandomX favor any specific ISAs?
15:56:37 <sech1> no, RandomX instruction set is a common denominator and it translates almost directly both to x86 and ARM
15:57:24 <m-relay> <c​harutocafe:matrix.org> do you know if anyone has tested RISC-V, PPC, or other ISAs?
15:59:44 <sech1> We don't have JIT compiler for these ISAs
15:59:47 <sech1> so it's not comparable
16:02:20 <tevador> btw, based on the 7700K benchmark, every hash needs 4584 extra cycles, so that's >57 AES rounds per cycle, not even an ASIC can do this
16:06:41 <sech1> at this scale (0.2%) it's hard to tell the real impact of changes, and count extra cycles
16:06:49 <sech1> it can swing the other way next time it's tested
16:07:02 <sech1> also, Intel CPUs should be tested with single thread
16:07:07 <sech1> because they all run 1 thread per core
16:07:19 <sech1> gingeropolous can you test your Intel CPUs with 1 thread?
16:08:08 <sech1> Use command line "--mine --jit --largePages --threads 1 --affinity 1 --init 16"
16:32:56 <sech1> Added my numbers for single thread Ryzen 7 1700, because it also runs 1 thread per core when mining
16:33:10 <sech1> It's even bigger speedup (more than 10%)
17:37:14 <selsta> I wanted to test on macOS ARM but seems the PR is not ready for that yet
19:02:00 <gingeropolous> magerd revert doesn't work. rm- r it is
19:06:31 <gingeropolous> still seeing that drop on single thread sech1 
19:09:41 <sech1> Did you run each test several times? I found that it can jump +-5 h/s in both directions
19:11:15 <sech1> I run each test 5 times and choose the highest reported hashrate
19:15:38 <gingeropolous> i did just get Performance: 746.367 hashes per second on v2
19:16:32 <gingeropolous> and v1 Performance: 747.852 hashes per second
19:16:37 <gingeropolous> noice
19:18:25 <gingeropolous> wish i had the newest intel chips
19:19:19 <sech1> so -0.2%
19:19:42 <sech1> I could test it on Hetzner auction servers, but the newest they have is Core i7-8700
19:21:10 <sech1> and the first Intel CPUs with faster AES (3 cycle latency) are Ice Lake (only mobile) and Rocket Lake (11xxx desktop series)
19:26:09 <gingeropolous> so the 13700KF would do it?
19:37:06 <m-relay> <c​harutocafe:matrix.org> sech1: is a JIT compiler for other ISAs expected? especially RISC-V since its anticipated growth?
19:56:58 <sech1> Eventually (c)
19:57:36 <sech1> gingeropolous 13700KF would do it, yes