10:46:11 <sech1> looks like 256-bit vector width is kind of a standard for RISC-V CPUs with vector support: https://cdn.mos.cms.futurecdn.net/waPNfjysh8LBEhHraZZiTh.png
10:46:21 <sech1> So I'll target 256-bit width in all my RandomX code
10:48:47 <sech1> Btw that CPU is designed by Jim Keller (AMD Zen, Apple M series)
10:52:01 <sech1> wow, even monsters like this exist: https://p2pool.io/u/37d40fdffe1ab072/image.png
10:52:05 <sech1> 512 bit wide vector unit
10:52:13 <sech1> and 4 MB L3 cache per core
10:52:19 <sech1> will be a monster for RandomX
14:31:30 <hyc> fun stuff
20:51:32 <jpk68> sech1: Which RISC-V board are you using? Orange Pi?
21:03:45 <DataHoarder> jpk68: 15:23:59 <@sech1> Got a new toy to play with https://p2pool.io/u/8f4ac95d0af11879/20251120_152219.jpg 
21:03:49 <DataHoarder> Orange Pi RV2
21:08:23 <jpk68> Thanks. Missed that photo somehow
21:23:19 <jpk68> Unfortunately it seems pretty hard to find RISC-V boards with reliable hardware AES. IIRC the performance gain from the Raspberry Pi 4 to 5 (which added hardware AES) was fairly substantial.
21:24:55 <sech1> I'm working on writing vectorized software AES for RISC-V, it should be much faster than the regular code.
21:25:34 <jpk68> Oh, cool
21:31:53 <jpk68> Is AES used for anything other than filling/hashing the dataset and scratchpad? I'm not too knowledgeable about what takes the most time per hash
21:34:12 <jpk68> I know this is a terrible comparison, but the Pi 5 is around 5x faster than my RISC-V board, which also has 4 cores.
21:34:18 <hyc> fAES is used in multiple parts of the algorithm
21:52:33 <sech1> soft aes is around 30% of RandomX hash time
21:52:48 <sech1> so if I make it 2x faster, hashrate will increase by ~15%