16:30:41 <DataHoarder> https://shop.bitmain.com/product/detail?pid=00020251226185131923DUjfvPIO06BC
16:31:25 <DataHoarder> > Shipping in July 2026
16:32:50 <DataHoarder> I wonder how many boards are stacked up here, 17kg
16:33:42 <DataHoarder> oh, same weight as their previous board stack, but 200 -> 1000 KH/s they advertise
16:48:15 <nioc> can't pay in monero  lool
16:50:41 <sech1> So they claim 400 h/s/watt basically
16:50:44 <sech1> Interesting
16:51:01 <sech1> Best tuned EPYC systems get 200-250 h/s/watt
16:51:17 <kico> let's fork!
16:51:38 <sech1> My plan is to finish RandomX V2 in Q1 2026 :P
16:51:44 <kico> <3
16:51:55 <DataHoarder> FCMP++ already has the commitment stuff in the pipeline
16:51:56 <sech1> RandomX v2 is missing the RISC-V code, but this is exactly what I've been working on in December
16:51:58 <kico> thanks for doing the needful sir _/\_
16:51:58 <DataHoarder> V2 probably if ready
16:52:13 <DataHoarder> V2 is "minor" overall, the AES part + rounding changes
16:52:24 <sech1> There might be some other changes ;)
16:52:28 <DataHoarder> ;)
16:52:30 <sech1> It's not set in stone yet
16:52:32 <kico> noice
16:52:48 <kico> would be fun to brick these inb4 release
16:52:49 <sech1> I think it should be tuned for Zen4/Zen5/Zen6 CPUs
16:52:52 <sech1> *tuned more
16:53:20 <sech1> As it's the main source of RandomX hashrate now, and ZenX CPUs will dominate the CPU market in the next 5 years or so
16:53:26 <DataHoarder> AVX512 128-bit specific masked operands :)
16:53:39 <DataHoarder> so 128-bit conditional lanes, which also exist in other instruction sets
16:54:00 <DataHoarder> kico: if they are some RISC-V tbh they are "cpu"s so unless they cheap out on what they include it can probably adapt
16:54:39 <kico> DataHoarder, yeah I mean a fork could at least make them less profitable 
16:54:53 <kico> "brick" was not the best word
16:55:16 <kico> they could need a FW update to adapt no?
16:55:16 <DataHoarder> I mean, if they are after all just plain old CPUs just more power efficient
16:55:37 <kico> sure
16:55:47 <DataHoarder> purpose of randomx about "someone implementing this just needs to make a more efficient CPU than existing"
16:56:08 <DataHoarder> no ssh needed in a performant way
16:56:16 <DataHoarder> they can cheap out there
16:56:36 <DataHoarder> they can kill all their branch prediction to reduce consumption and silicon
16:57:18 <kico> ic
17:00:36 <kico> Operating altitude(2-5), m 	≤2000
17:00:43 <kico> no mining in tibet!
17:00:46 <kico> ah!
17:01:01 <kico> based jihan
21:13:06 <sech1> This PR completes XMRig's RISC-V support https://github.com/xmrig/xmrig/pull/3749
21:13:11 <sech1> Nothing more to do there
21:13:19 <sech1> Now I can focus on RandomX v2 :)
21:13:42 <sech1> Oh, but first I need to move all new RISC-V code to the upstream repo
21:13:54 <sech1> In January probably
21:19:26 <sech1> https://github.com/tevador/RandomX/pull/274#issuecomment-3697565152
21:55:05 <sech1> https://www.reddit.com/r/Monero/comments/1pyzdpc/randomx_v2_update/