15:26:20 <br-m> <neromonero1024> I got a question about rx v2
15:26:36 <br-m> <neromonero1024> DRAM latency is ~50ns. However, that's available only at the absolute best RAM kits, right? Average people's DRAM latency should be around 60-70ns as most of them are running slower RAM kits.
15:26:46 <br-m> <neromonero1024> For example, using AIDA64, my 5700X rig's DRAM latency is as follows:
15:26:46 <br-m> <neromonero1024> * 3200 @ 16-18-18-18-36: 65ns
15:26:46 <br-m> <neromonero1024> * 2400 @ 14-14-14-14-34: 75ns
15:27:00 <br-m> <neromonero1024> these are the RAM latency I think is the most common. So, why optimize for 50ns latency whereas 65-70ns is the most realistic scenario? is it related to memory hardness? If yes, how much does it actually affect it?
15:30:29 <br-m> <neromonero1024> side note: here are a couple of ways I thought that can be used to increase the target latency
15:30:29 <br-m> <neromonero1024> * change the internals of rx v2 so that it prefetches N+3 data from RAM... potentially significant work
15:30:30 <br-m> <neromonero1024> * change randomx_program_size_v2 from 384 to 512... CPU spends more time executing before requiring RAM data, thus increasing the target latency
15:30:30 <br-m> <neromonero1024> * on miner's side, could reducing CPU's clock speed be effectively increasing the target latency? as the CPU runs slower, it reaches the point of needing RAM data slower (here, I'm assuming once the RAM data fetch instruction is dispatched, the speed isn't coupled with CPU frequency)
15:34:08 <sech1> It wasn't optimized for low latency? It's optimized for running CPU code while data from RAM is in flight. rx v2 is more tolerant to latency, which is clearly visible in laptop CPU benchmarks - they have high latency RAM and got the most speedup
15:36:23 <br-m> <neromonero1024> oh... got it