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sech1Got a new toy to play with p2pool.io/u/8f4ac95d0af11879/20251120_152219.jpg
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sech18 RISC-V cores, 512 KB L2 cache per core, and it supports RISC-V vector extensions
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sech1So my plan is to add vector extensions support to RandomX RISC-V code before Christmas
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sech1But I don't have heatsinks for it yet, they'll arrive in a couple of weeks
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sech1ahh, no... 512KB L2 cache is per a cluster of 4 cores, only
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hycheh have fun
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hycnice to have hardware with the official vector support now
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sech1Unfotunately it has no AES support, and too small cache for RandomX. But it's a relatively cheap RISC-V board.
