So, the Thead C910 RISC-V processors have a major bug in their vector instruction set impl mastodon.social/@harold⊙mgp/112922089951656384

one of the vector instructions accesses physical memory directly, with no virtual address translation

some folks seem to be trying to make a big deal about it, but realistically there's about 0 software in the world that uses vector instructions on C910

since that only implemented the version 0.7 draft of Risc-V vector spec, and only Thead's patched gcc generated code to use it

there is absolutely zero code in kernel or system libraries using these instructions, so mitigation by disabling the vector extension will have zero impact on OS performance

securityweek.com/ghostwrite-vulnera…-attacks-on-devices-with-risc-v-cpu Disabling the vector extension in the CPU mitigates attacks, but also impacts performance. => yeah but what kinda performance

anything that does math

or video encoding etc etc

Yeah I was addressing the article author because that's vague. Not everybody needs such work loads.

That kinda wording sounds like you disabled cache on a ryzen..

elucidator: its like disabling a cpu instruction

say disabling avx/2 on a modern cpu

Yeah, which wouldn't criple it as much

well depends on software

Ofc

say you do A + BX

now you have to do it on two steps, B*X first then add A

not a straight up A + BX

some shit like that

Thanks for explaining basic vector math :)

again, zero impact on the OS because nothing in the kernel or libraries would ever use those instructions

maybe some impact in some specialized applications, because you had to go far out of your way to find a toolchain that supported that instruction set

i.e., maybe some impact in code you built yourself, specifically for this obsolete instruction set...

(like my abandoned effort to use the instructions in RandomX ...)

hyc I tried to use AVX512VL (256-bit registers with) in RandomX, it didn't speed up anything. The idea was that a 256-bit wide register can hold 2 RandomX FP registers, and some instructions can be merged with some others: github.com/SChernykh/xmrig/tree/avx512

like this: SChernykh/xmrig cd6eae1