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sech1Add a kernel call (possibly two kernel calls - one for aesenc, one for aesdec) to that latency. It can't be efficient enough for the main loop AES.
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DataHoarderI wonder if they do that AES for single rounds or do they have specific n round calls?
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DataHoarderon the coprocessor
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sech1They must have N round calls, or even some sort of programming language for this accelerator
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sech1Something like OpenCL, but for crypto primitives
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sech1Someone needs to get their hands on SDK :)
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DataHoarder
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DataHoarderthey have a couple of active branches here
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DataHoarder
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DataHoarderforked from above too github.com/revyos/sg2044-vendor-kernel
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DataHoarder
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DataHoarderthis has isa extension list
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DataHoarder/say // pka device, change size from 0x1000 to 0x6000
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DataHoarderpka: pka@7040040000 {
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DataHoardercompatible = "snps,designware-pka";
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DataHoarderactual list upstream on their repo github.com/sophgo/linux-riscv/blob/…cv/boot/dts/sophgo/sg2044-cpus.dtsi
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DataHoarderthat folder has more definitions
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DataHoarderseems that just accelerates ECC/EdSA/RSA
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DataHoarderit's probably another desingware IP if I had to guess
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DataHoarderenjoy digging
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sech1I found all kinds of aes, even implementations for different architectures, but not their SPACC
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sech1#define SG2044_RST_SPACC 188
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sech1the only mention I found
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DataHoarderindeed
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gingeropolouswell i got a benchmarking script working for windows in powershell, except for the msr mod. requires manual stuff. maybe we'll get more #s if windows users can bench
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sech1They can bench with xmrig (dev branch)
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sech1But it's hard to automate because xmrig doesn't auto-exit after benchmark finishes